View IDT49FCT805BT_26062.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

FAST CMOS BUFFER/CLOCK DRIVER
Integrated Device Technology, Inc.
IDT49FCT805BT/CT IDT49FCT806BT/CT
FEATURES:
* * * * * * * * * * * 0.5 MICRON CMOS Technology Guaranteed low skew < 500ps (max.) Very low duty cycle distortion < 600ps (max.) Low CMOS power levels TTL compatible inputs and outputs TTL level output voltage swings High drive: -32mA IOH, 48mA IOL Two independent output banks with 3-state control 1:5 fanout per bank `Heartbeat' monitor output ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) * Available in DIP, SOIC, SSOP, QSOP, Cerpack and LCC packages
* Military product compliant to MIL-STD-883, Class B
DESCRIPTION:
The IDT49FCT805BT/CT and IDT49FCT806BT/CT are clock drivers built using advanced dual metal CMOS technology. The IDT49FCT805BT/CT is a non-inverting clock driver and the IDT49FCT806BT/CT is an inverting clock driver. Each device consists of two banks of drivers. Each bank drives five output buffers from a standard TTL compatible input. The 805BT/CT and 806BT/CT have extremely low output skew, pulse skew, and package skew. The devices has a "heartbeat" monitor for diagnostics and PLL driving. The MON output is identical to all other outputs and complies with the output specifications in this document. The 805BT/CT and 806BT/CT offer low capacitance inputs with hysteresis.
FUNCTIONAL BLOCK DIAGRAMS
IDT49FCT805T
IDT49FCT806T
OEA
OEA
INA
5 OA1-OA5
INA
5
OA1-OA5
INB
5
OB1-OB5
INB
5
OB1-OB5
OEB MON
OEB MON
2920 drw 01
2920 drw 02
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
(c)1996 Integrated Device Technology, Inc.
OCTOBER 1995
DSC-2920/5
9.2
1
IDT49FCT805BT/CT, 806BT/CT FAST CMOS BUFFER/CLOCK DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATIONS
IDT49FCT805T
OA2 OA1
VCC OA1 OA2 OA3 GND OA4 OA5 GND OEA INA 1 2 3 4 5 6 7 8 9 10 P20-1 D20-1 SO20-2 SO20-7 SO20-8 & E20-1 20 19 18 17 16 15 14 13 12 11 VCC OB1 OB2 OB3 GND OB4 OB5 MON OEB INB
INDEX
3 OA3 GND OA4 OA5 GND 4 5 6 7 8
2
1
20 19 18 17 OB2 OB3 GND OB4 OB5
L20-2
OB1
16 15 14
9 10 11 12 13
VCC INB
VCC OEB
LCC TOP VIEW
MON
2920 drw 04
OEA
OA2
INDEX
DIP/SOIC/SSOP/QSOP/CERPACK TOP VIEW 2920 drw 03
IDT49FCT806T
OA1
INA
VCC OA1 OA2 OA3 GND OA4 OA5 GND OEA INA
1 2 3 4 5 6 7 8 9 10 P20-1 D20-1 SO20-2 SO20-7 SO20-8 & E20-1
20 19 18 17 16 15 14 13 12 11
VCC OB1 OB2 OB3 GND OB4 OB5 MON OEB INB
OA3 GND OA4 OA5 GND 4 5 6 7 8
3
2 1
20 19 18 17 L20-2 16 15 14 OB2 OB3 GND OB4 OB5
9 10 11 12 13
OEA
INA
INB
OEB
LCC TOP VIEW
MON
2920 drw 06
DIP/SOIC/SSOP/QSOP/CERPACK TOP VIEW 2920 drw 05
PIN DESCRIPTION
FUNCTION TABLE(1)
Outputs Inputs 49FCT805T MON L H L H L H L H L H Z Z 49FCT806T
OEA, OEB
INA, INB OAn, OBn
Pin Names
Description 3-State Output Enable Inputs (Active LOW) Clock Inputs Clock Outputs (FCT805T) Clock Outputs (FCT806T) Monitor Output (FCT805T) Monitor Output (FCT806T)
2920 tbl 01
OE OE OEA, OEB
L L H H
OB1
VCC
VCC
INA, INB OAn, OBn
OA OB OAn, OBn
H L Z Z
MON
H L H L
2920 tbl 02
OAn, OBn
MON
MON
NOTE: 1. H = HIGH, L = LOW, Z = High Impedance
9.2
2
IDT49FCT805BT/CT, 806BT/CT FAST CMOS BUFFER/CLOCK DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
ABSOLUTE MAXIMUM RATINGS(1)
Symbol Rating VTERM(2) Terminal Voltage with Respect to GND VTERM(3) Terminal Voltage with Respect to GND TA Operating Temperature TBIAS Temperature Under Bias TSTG Storage Temperature IOUT DC Output Current Commercial -0.5 to +7.0 Military -0.5 to +7.0 Unit V
CAPACITANCE (TA = +25C, f = 1.0MHz)
Symbol Parameter(1) CIN Input Capacitance COUT Output Capacitance Conditions VIN = 0V VOUT = 0V Typ. 4.5 5.5 Max. Unit 6.0 pF 8.0
pF
-0.5 to VCC +0.5 0 to +70 -55 to +125 -55 to +125 -60 to +120
-0.5 to VCC +0.5 -55 to +125 -65 to +135 -65 to +150 -60 to +120
V C C C mA
2920 lnk 04 NOTE: 1. This parameter is measured at characterization but not tested.
2920 lnk 03 NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. No terminal voltage may exceed VCC by +0.5V unless otherwise noted. 2. Input and VCC terminals. 3. Output and I/O terminals.
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified Commercial: TA = 0C to +70C, VCC = 5.0V 5%; Military: TA = -55C to +125C, VCC = 5.0V 10%
Symbol VIH VIL II H II L IOZH IOZL II VIK IOS VOH Parameter Input HIGH Level Input LOW Level Input HIGH Input LOW Current (5) Current (5) pins) (5) VCC = Min., IIN= -18mA VCC = Max.(3) , VO = GND IOH = -12mA MIL. IOH = -15mA COM'L. IOH = -24mA MIL. IOH = -32mA COM'L.(4) VCC = Min. IOL = 32mA MIL. VIN = VIH or VIL IOL = 48mA COM'L. VCC = 0V, VIN or VO 4.5V -- VCC = Max., VIN = GND or VCC VCC = Min. VIN = VIH or VIL Test Conditions(1) Guaranteed Logic HIGH Level Guaranteed Logic LOW Level VCC = Max. VCC = Max. VCC = Max. VI = 2.7V VI = 0.5V VO = 2.7V VO = 0.5V VCC = Max., VI = VCC (Max.) Min. 2.0 -- -- -- -- -- -- -- -60 2.4 2.0 -- -- -- -- Typ.(2) -- -- -- -- -- -- -- -0.7 -120 3.3 3.0 0.3 -- 150 5 Max. -- 0.8 Unit V V
1 1 1 1 1
-1.2 -225 -- -- 0.55
A A A A A
V mA V
High Impedance Output Current (3-State Output Input HIGH Current (5)
Clamp Diode Voltage Short Circuit Current Output HIGH Voltage
VOL
IOFF VH
Output LOW Voltage Input/Output Power Off Leakage(5) Input Hysteresis for all inputs Quiescent Power Supply Current
V
1
-- 500
A
mV
ICCL ICCH ICCZ
A
NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at Vcc = 5.0V, +25C ambient. 3. Not more than one output should be tested at one time. Duration of the test should not exceed one second. 4. Duration of the condition can not exceed one second. 5. The test limit for this parameter is 5A at TA = -55C.
2920 lnk 05
9.2
3
IDT49FCT805BT/CT, 806BT/CT FAST CMOS BUFFER/CLOCK DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
Parameter ICC ICCD Quiescent Power Supply Current TTL Inputs HIGH Dynamic Power Supply Current (4) VCC = Max. VIN = 3.4V(3) VCC = Max. Outputs Open OEA = OEB = GND 50% Duty Cycle VCC = Max. Outputs Open fo = 25MHz 50% Duty Cycle OEA = OEB =VCC Mon. Output Toggling VCC = Max. Outputs Open fo = 50MHz 50% Duty Cycle OEA = OEB = GND Eleven Outputs Toggling VIN = VCC VIN = GND Test Conditions(1) Min. -- -- Typ.(2) 0.5 60 Max. 2.0 100 Unit mA
A/ MHz/bit
IC
Total Power Supply Current (6)
VIN = VCC VIN = GND VIN = 3.4V VIN = GND VIN = VCC VIN = GND VIN = 3.4V VIN = GND
--
1.5
3.0
mA
--
1.8
4.0
--
33
55.5 (5)
--
33.5
57.5 (5)
NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25C ambient. 3. Per TTL driven input; (VIN = 3.4V); all other inputs at VCC or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested. 6. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ICC DHNT + ICCD (fONO) ICC = Quiescent Current (ICCL, ICCH and ICCZ) ICC = Power Supply Current for a TTL High Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fO= Output Frequency NO= Number of Outputs at fO All currents are in milliamps and all frequencies are in megahertz.
2920 tbl 06
9.2
4
IDT49FCT805BT/CT, 806BT/CT FAST CMOS BUFFER/CLOCK DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE(3,4)
IDT49FCT805BT/806BT Com'l. Symbol Parameter tPLH Propagation Delay INA to OAn, INB to OBn tPHL tR Output Rise Time tF tSK(o) tSK(p) tSK(t) Output Fall Time Output skew: skew between outputs of all banks of same package (inputs tied together) Pulse skew: skew between opposite transitions of same output (|tPHL-t PLH|) Package skew: skew between outputs of different packages at same power supply voltage, temperature, package type and speed grade Output Enable Time OEA to OAn, OEB to OBn Output Disable Time OEA to OAn, OEB to OBn Condition(1) CL = 50pF RL = 500
Min. (2) Max.
IDT49FCT805CT/806CT Com'l.
Min. (2) Max.
Mil.
Min. (2) Max.
Mil.
Min. (2) Max.
1.5 -- -- -- -- --
5.0 1.5 1.5 0.7 0.7 1.2
1.5 -- -- -- -- --
5.7 2.0 1.5 0.9 0.9 1.5
1.5 -- -- -- -- --
4.5 1.5 1.5 0.5 0.6 1.0
1.5 -- -- -- -- --
5.2 2.0 1.5 0.7 0.8 1.2
Unit ns ns ns ns ns ns
tPZL tPZH tPLZ tPHZ
1.5 1.5
6.0 6.0
1.5 1.5
6.5 6.5
1.5 1.5
5.0 5.0
1.5 1.5
6.0 6.0
ns ns
2920 tbl 07 NOTES: 1. See test circuits and waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. tPLH, tPHL, tSK(t) are production tested. All other parameters guaranteed but not production tested. 4. Propagation delay range indicated by Min. and Max. limit is due to VCC, operating temperature and process parameters. These propagation delay limits do not imply skew.
9.2
5
IDT49FCT805BT/CT, 806BT/CT FAST CMOS BUFFER/CLOCK DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TEST CIRCUITS AND WAVEFORMS TEST CIRCUIT FOR ALL OUTPUTS
VCC 500 VIN Pulse Generator RT D.U.T. 50pF CL
2920 drw 07
7.0V
ENABLE AND DISABLE TIME SWITCH POSITION
Test Disable LOW Enable LOW Disable HIGH Enable HIGH Switch Closed Open
V OUT
500
2920 lnk 08 DEFINITIONS: CL= Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
PACKAGE DELAY
3V 1.5V INPUT tPLH tPHL VOH 2.0V OUTPUT tR tF
2920 drw 08
OUTPUT SKEW- tSK(o)
INPUT 3V 1.5V 0V VOH 1.5V VOL VOH 1.5V VOL
0V
tPLH1
tPHL1
OUTPUT 1 tSK(o) OUTPUT 2 tPLH2 tPHL2 tSK(o)
1.5V VOL
0.8V
tSK(o) = |tPLH2 - tPLH1| or |tPHL2 - tPHL1|
2920 drw 09
PULSE SKEW - tSK(p)
3V 1.5V 0V tPLH tPHL VOH 1.5V VOL
PACKAGE SKEW - tSK(t)
3V 1.5V 0V VOH 1.5V VOL VOH 1.5V VOL
INPUT
tPLH1
tPHL1
INPUT
PACKAGE 1 OUTPUT tSK(t) PACKAGE 2 OUTPUT tSK(t)
OUTPUT tSK(p) = |tPHL - tPLH|
tPLH2
tPHL2
2920 drw 10
tSK(t) = |tPLH2 - tPLH1| or |tPHL2 - tPHL1|
Package 1 and Package 2 are same device type and speed grade
2920 drw 11
ENABLE AND DISABLE TIMES
ENABLE CONTROL INPUT t OUTPUT NORMALLY LOW OUTPUT NORMALLY HIGH
PZL
DISABLE 3V 1.5V 0V t PLZ 3.5V 1.5V t 1.5V 0V
PHZ
SWITCH CLOSED t PZH SWITCH OPEN
3.5V 0.3V V OL 0.3V VOH 0V
2920 drw 12
NOTES: 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH 2. Pulse Generator for All Pulses: f 1.0MHz; tF 2.5ns; tR 2.5ns
9.2
6
IDT49FCT805BT/CT, 806BT/CT FAST CMOS BUFFER/CLOCK DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
ORDERING INFORMATION
IDT49FCT XXX Device Type XX Package X Process/ Temperature Range Blank B Commercial (0C to +70C) MIL-STD-883, Class B (-55C to +125C)
P D E L SO PY Q 805BT 806BT 805CT 806CT
Plastic DIP CERDIP CERPACK Leadless Chip Carrier Small Outline IC Shrink Small Outline IC Quarter-size Small Outline Package Non-Inverting Buffer/Clock Driver Inverting Buffer/Clock Driver
2920 drw 13
9.2
7

▲Up To Search▲

Price & Availability of IDT49FCT805BT

	To Download IDT49FCT805BT Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .